ARD2  1.00 for Rev B. Hardware
Airbag Reference Demonstrator using MPC5604P
FCU.h
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00001 
00017 #ifndef FCU_H_
00018 #define FCU_H_
00019 
00020 /*
00021  **************************************************************
00022  * Defines, Macros and Typedefs 
00023  **************************************************************/
00024 /*** Constant Macros ***/
00025 /* Default Yes and No defines */
00026 #ifndef TRUE
00027  #define TRUE (1u)
00028 #endif
00029 #ifndef CLEAR
00030  #define CLEAR (0u)
00031 #endif
00032 #ifndef BITS_IN_NIBBLE
00033  #define BITS_IN_NIBBLE (4u)
00034 #endif
00035 #ifndef BITS_IN_BYTE
00036  #define BITS_IN_BYTE (8u)
00037 #endif
00038 #ifndef BYTES_IN_16
00039  #define BYTES_IN_16  (2u)
00040 #endif
00041 #ifndef BYTES_IN_32
00042  #define BYTES_IN_32  (4u)
00043 #endif
00044 
00045 #ifndef BIT_DEFINITION
00046  #define BIT_DEFINITION
00047  #define BIT0  (1u << 0u)
00048  #define BIT1  (1u << 1u)
00049  #define BIT2  (1u << 2u)
00050  #define BIT3  (1u << 3u)
00051  #define BIT4  (1u << 4u)
00052  #define BIT5  (1u << 5u)
00053  #define BIT6  (1u << 6u)
00054  #define BIT7  (1u << 7u)
00055  #define BIT8  (1u << 8u)
00056  #define BIT9  (1u << 9u)
00057  #define BIT10 (1u << 10)
00058  #define BIT11 (1u << 11)
00059  #define BIT12 (1u << 12)
00060  #define BIT13 (1u << 13)
00061  #define BIT14 (1u << 14)
00062  #define BIT15 (1u << 15)
00063  #define BIT16 (1u << 16)
00064  #define BIT17 (1u << 17)
00065  #define BIT18 (1u << 18)
00066  #define BIT19 (1u << 19)
00067  #define BIT20 (1u << 20)
00068  #define BIT21 (1u << 21)
00069  #define BIT22 (1u << 22)
00070  #define BIT23 (1u << 23)
00071  #define BIT24 (1u << 24)
00072  #define BIT25 (1u << 25)
00073  #define BIT26 (1u << 26)
00074  #define BIT27 (1u << 27)
00075  #define BIT28 (1u << 28)
00076  #define BIT29 (1u << 29)
00077  #define BIT30 (1u << 30)
00078  #define BIT31 (1u << 31)
00079 #endif
00080 
00081 /* HW Status masks */
00082 /* for module status */
00083 #define FCU_IS_IN_INIT   (0x01u)
00084 #define FCU_IS_NORMAL    (0x02u)
00085 #define FCU_IS_ALARMED   (0x04u)
00086 #define FCU_IS_AT_FAULT  (0x08u)
00087 
00088 /* Error status bits */
00089 #define FCU_LOCKED (0x10u)
00090 
00091 /* for fault interpretation */
00092 #define FCU_CORE_CHECKSTOP_MODE_ENTERED BIT0
00093 #define FCU_CORE_RESET BIT1
00094 #define FCU_LOSS_OF_XTAL BIT2
00095 #define FCU_LOSS_OF_PLL0_LOCK BIT3
00096 #define FCU_FREQ0_OUT_OF_RANGE BIT4
00097 #define FCU_LOSS_OF_PLL1_LOCK BIT5
00098 #define FCU_FREQ1_OUT_OF_RANGE BIT6
00099 #define FCU_FLASH_FATAL_ERROR BIT7
00100 #define FCU_WATCHDOG_RESET    BIT8
00101 #define FCU_JTAG_RESET        BIT9
00102 #define FCU_POWER_COMPARATOR_ERROR BIT10
00103 #define FCU_LVD_4_5                BIT11
00104 #define FCU_LVD_2_7_VREG           BIT12
00105 #define FCU_LVD_2_7_FLASH          BIT13
00106 #define FCU_LVD_2_7_I_0            BIT14
00107 #define FCU_LVD_1_2_DIG            BIT15
00108 
00109 #define FCU_ERROR                  BIT31
00110 #define FCU_SW_TRIGGERED_ERROR     BIT30
00111 #define FCU_CODE_FLASH_ECC_ERROR   BIT29
00112 #define FCU_DATA_FLASH_ECC_ERROR   BIT28
00113 #define FCU_SRAM_ECC_ERROR         BIT27
00114 #define FCU_CONFIG_ERROR                  BIT7
00115 #define FCU_CONFIG_SW_TRIGGERED_ERROR     BIT6
00116 #define FCU_CONFIG_CODE_FLASH_ECC_ERROR   BIT5
00117 #define FCU_CONFIG_DATA_FLASH_ECC_ERROR   BIT4
00118 #define FCU_CONFIG_SRAM_ECC_ERROR         BIT3
00119 
00120 /* For time-out */
00121 #define FCU_4MS_TIMEOUT 0xFFFFu
00122 
00123 /*** Function Macros ***/
00124 #ifndef N_ELEMENTS
00125  #define N_ELEMENTS(X)           (sizeof(X)/sizeof(*(X)))
00126 #endif
00127 
00128 /* [0] */
00129 #define FCU_TIMEOUT(XX)           (XX)
00130 /* [1] */
00131 #define FCU_TES0_ENABLED          (0x80000000u)
00132 #define FCU_TES0_DISABLED         (0x00000000u)
00133 #define FCU_TES1_ENABLED          (0x40000000u)
00134 #define FCU_TES1_DISABLED         (0x00000000u)
00135 #define FCU_TES2_ENABLED          (0x20000000u)
00136 #define FCU_TES2_DISABLED         (0x00000000u)
00137 #define FCU_TES3_ENABLED          (0x10000000u)
00138 #define FCU_TES3_DISABLED         (0x00000000u)
00139 #define FCU_TES4_ENABLED          (0x08000000u)
00140 #define FCU_TES4_DISABLED         (0x00000000u)
00141 #define FCU_ESF0_ENABLED          (0x00800000u)
00142 #define FCU_ESF0_DISABLED         (0x00000000u)
00143 #define FCU_ESF1_ENABLED          (0x00400000u)
00144 #define FCU_ESF1_DISABLED         (0x00000000u)
00145 #define FCU_ESF2_ENABLED          (0x00200000u)
00146 #define FCU_ESF2_DISABLED         (0x00000000u)
00147 #define FCU_ESF3_ENABLED          (0x00100000u)
00148 #define FCU_ESF3_DISABLED         (0x00000000u)
00149 #define FCU_ESF4_ENABLED          (0x00080000u)
00150 #define FCU_ESF4_DISABLED         (0x00000000u)
00151 #define FCU_ENABLE_CH(XX)         ((XX))
00152 /* [2] */
00153 #define FCU_TIMEOUT_CH(XX)        ((XX) << 16u)
00154 #define FCU_NO_TEST_MODE         0x00u
00155 #define FCU_TEST_MODE_NO_PINS    0x400u
00156 #define FCU_TEST_MODE_WITH_PINS  0x800u
00157 #define FCU_OUTPUT_POL_NORMAL    0x0U
00158 #define FCU_OUTPUT0_INV_POL      0x100u
00159 #define FCU_OUTPUT1_INV_POL      0x200u
00160 #define FCU_OUTPUT_INV_POL       0x300u
00161 #define FCU_OUTPUT_IS_DUAL_RAIL   0u
00162 #define FCU_OUTPUT_IS_TIME_SWITCH 0x40u
00163 #define FCU_OUTPUT_IS_BISTABLE    0x80u
00164 #define FCU_OUTPUT_FREQ(XX)       ((XX) & 0x7u)
00165 
00166 /*** Enums ***/
00167 
00168 
00169 /*** TypeDefs ***/
00170 typedef union
00171 {
00172   struct
00173   {
00174     vuint32_t Timeout; /* [0] Timeout value for alarm */
00175     vuint8_t TES0: 1; /* [1] Enable time-out for software */
00176     vuint8_t TES1: 1; /* [1] Enable time-out for software */
00177     vuint8_t TES2: 1; /* [1] Enable time-out for software */
00178     vuint8_t TES3: 1; /* [1] Enable time-out for software */
00179     vuint8_t TES4: 1; /* [1] Enable time-out for software */
00180     vuint8_t Reserved3: 3; /* [1] */
00181     vuint8_t ESF0: 1; /* [1] Enable Software flag */
00182     vuint8_t ESF1: 1; /* [1] Enable Software flag */
00183     vuint8_t ESF2: 1; /* [1] Enable Software flag */
00184     vuint8_t ESF3: 1; /* [1] Enable Software flag */
00185     vuint8_t ESF4: 1; /* [1] Enable Software flag */
00186     vuint8_t Resevered2: 3; /* [1] */
00187     vuint16_t HardwareEnable; /* [1] Enable Hardware flag */
00188     vuint16_t TEH; /* [2] Enable time-out for hardware */ 
00189     vuint8_t Reserved: 4; /* [2] */
00190     vuint8_t TM:  2; /* [2] Test Mode */
00191     vuint8_t PS:  2; /* [2] Polarity Switch */
00192     vuint8_t FOM: 2; /* [2] Fault Output Mode */
00193     vuint8_t FOP: 6; /* [2] Fault Output Prescaler */
00194   }P;
00195   
00196   vuint32_t A[3u];
00197 } FCUConfig_t;
00198 
00199 /*
00200  **************************************************************
00201  * Declarations 
00202  **************************************************************/
00203 /*** Global ***/
00204 /*** Static ***/
00205 
00206 /*** Constant ***/
00207 /*
00208  **************************************************************
00209  * Function Prototypes 
00210  **************************************************************/
00211 /*
00212  ******************************************************************************
00213  *
00214  * Function:          u8fnFCUInit()
00215  *
00216  */
00224 uint8_t u8fnFCUInit(FCUConfig_t* ptMyConfig);
00225 /*
00226  ******************************************************************************
00227  *
00228  * Function:          u8fnFCUEnableConfig()
00229  *
00230  */
00237 uint8_t u8fnFCUEnableConfig(void);
00238 /*
00239  ******************************************************************************
00240  *
00241  * Function:          u8fnFCUSMStatus()
00242  *
00243  */
00250 uint8_t u8fnFCUSMStatus(void);
00251 #endif /* FCU_H_ */